#include <icuid/icuid_err.h>
#include <icuid/icuid_limits.h>
#include <icuid/icuid_types.h>

Classes
struct	cpuid_raw_data_t

struct	cpuid_data_t

Enumerations
enum	cpuid_feature_t { CPU_FEATURE_PNI = 0, CPU_FEATURE_PCLMULDQ, CPU_FEATURE_DTS64, CPU_FEATURE_MONITOR, CPU_FEATURE_DS_CPL, CPU_FEATURE_VMX, CPU_FEATURE_SMX, CPU_FEATURE_EST, CPU_FEATURE_TM2, CPU_FEATURE_SSSE3, CPU_FEATURE_CID, CPU_FEATURE_SDBG, CPU_FEATURE_FMA, CPU_FEATURE_CX16, CPU_FEATURE_XTPR, CPU_FEATURE_PDCM, CPU_FEATURE_PCID, CPU_FEATURE_DCA, CPU_FEATURE_SSE4_1, CPU_FEATURE_SSE4_2, CPU_FEATURE_X2APIC, CPU_FEATURE_MOVBE, CPU_FEATURE_POPCNT, CPU_FEATURE_TSC_DEADLINE, CPU_FEATURE_AES, CPU_FEATURE_XSAVE, CPU_FEATURE_OSXSAVE, CPU_FEATURE_AVX, CPU_FEATURE_F16C, CPU_FEATURE_RDRAND, CPU_FEATURE_HYPERVISOR, CPU_FEATURE_FPU, CPU_FEATURE_VME, CPU_FEATURE_DE, CPU_FEATURE_PSE, CPU_FEATURE_TSC, CPU_FEATURE_MSR, CPU_FEATURE_PAE, CPU_FEATURE_MCE, CPU_FEATURE_CX8, CPU_FEATURE_APIC, CPU_FEATURE_SEP, CPU_FEATURE_MTRR, CPU_FEATURE_PGE, CPU_FEATURE_MCA, CPU_FEATURE_CMOV, CPU_FEATURE_PAT, CPU_FEATURE_PSE36, CPU_FEATURE_PN, CPU_FEATURE_CLFLUSH, CPU_FEATURE_DTS, CPU_FEATURE_ACPI, CPU_FEATURE_MMX, CPU_FEATURE_FXSR, CPU_FEATURE_SSE, CPU_FEATURE_SSE2, CPU_FEATURE_SS, CPU_FEATURE_HT, CPU_FEATURE_TM, CPU_FEATURE_IA64, CPU_FEATURE_PBE, CPU_FEATURE_FSGSBASE, CPU_FEATURE_TSC_ADJUST, CPU_FEATURE_SGX, CPU_FEATURE_BMI1, CPU_FEATURE_HLE, CPU_FEATURE_AVX2, CPU_FEATURE_SMEP, CPU_FEATURE_BMI2, CPU_FEATURE_ERMS, CPU_FEATURE_INVPCID, CPU_FEATURE_RTM, CPU_FEATURE_CQM, CPU_FEATURE_MPX, CPU_FEATURE_AVX512F, CPU_FEATURE_AVX512DQ, CPU_FEATURE_RDSEED, CPU_FEATURE_ADX, CPU_FEATURE_SMAP, CPU_FEATURE_PCOMMIT, CPU_FEATURE_CLFLUSHOPT, CPU_FEATURE_CLWB, CPU_FEATURE_AVX512PF, CPU_FEATURE_AVX512ER, CPU_FEATURE_AVX512CD, CPU_FEATURE_SHA, CPU_FEATURE_AVX512BW, CPU_FEATURE_AVX512VL, CPU_FEATURE_LAHF_LM, CPU_FEATURE_CMP_LEGACY, CPU_FEATURE_SVM, CPU_FEATURE_EXTAPIC, CPU_FEATURE_CR8_LEGACY, CPU_FEATURE_ABM, CPU_FEATURE_SSE4A, CPU_FEATURE_MISALIGNSSE, CPU_FEATURE_3DNOWPREFETCH, CPU_FEATURE_OSVW, CPU_FEATURE_IBS, CPU_FEATURE_XOP, CPU_FEATURE_SKINIT, CPU_FEATURE_WDT, CPU_FEATURE_LWP, CPU_FEATURE_FMA4, CPU_FEATURE_TCE, CPU_FEATURE_NODEID_MSR, CPU_FEATURE_TBM, CPU_FEATURE_TOPOEXT, CPU_FEATURE_PERFCTR_CORE, CPU_FEATURE_PERFCTR_NB, CPU_FEATURE_BPEXT, CPU_FEATURE_PERFCTR_L2, CPU_FEATURE_MONITORX, CPU_FEATURE_SYSCALL, CPU_FEATURE_NX, CPU_FEATURE_MMXEXT, CPU_FEATURE_FXSR_OPT, CPU_FEATURE_PDPE1GB, CPU_FEATURE_RDTSCP, CPU_FEATURE_LM, CPU_FEATURE_3DNOWEXT, CPU_FEATURE_3DNOW, CPU_FEATURE_TS, CPU_FEATURE_FID, CPU_FEATURE_VID, CPU_FEATURE_TTP, CPU_FEATURE_TM_AMD, CPU_FEATURE_STC, CPU_FEATURE_100MHZSTEPS, CPU_FEATURE_HWPSTATE, CPU_FEATURE_CONSTANT_TSC, CPU_FEATURE_CPB, CPU_FEATURE_APERFMPERF, CPU_FEATURE_PFI, CPU_FEATURE_PA, CPU_FEATURE_CLZERO, CPU_FEATURE_IRPERF, CPU_FEATURE_SME, NUM_CPU_FEATURES }
	CPU feature bits. More...

enum	cpu_vendor_t { VENDOR_UNKNOWN = 0, VENDOR_INTEL, VENDOR_AMD, VENDOR_CYRIX, VENDOR_NEXGEN, VENDOR_TRANSMETA, VENDOR_UMC, VENDOR_CENTAUR, VENDOR_RISE, VENDOR_SIS, VENDOR_NSC, VENDOR_VIA, VENDOR_HV_KVM, VENDOR_HV_HYPERV, VENDOR_HV_VMWARE, VENDOR_HV_XEN, NUM_CPU_VENDORS }
	CPU vendor, as we determined from the Vendor String. More...

enum	xfeature_t { XFEATURE_FP = 0, XFEATURE_SSE, XFEATURE_AVX, XFEATURE_BNDREGS, XFEATURE_BNDCSR, XFEATURE_OPMASK, XFEATURE_ZMM_Hi256, XFEATURE_Hi16_ZMM, XFEATURE_IA32_XSS, XFEATURE_PKRU, NUM_XFEATURES }
	XSAVE Features, used to determine if a particular feature is supported and enabled by the OS. More...

Functions
void	cpuid (uint32_t eax, uint32_t *regs)
	Run the cpuid instruction. More...

void	cpuid_ext (uint32_t *regs)
	Run the cpuid instruction with custom register values. More...

int	cpuid_is_supported (void)
	Check if the cpuid instruction is supported. More...

uint64_t	icuid_xgetbv (const uint32_t xcr)
	Run the xgetbv instruction. More...

const char *	cpu_feature_str (cpuid_feature_t feature)
	Returns the short form of the CPU feature flag. More...

int	cpuid_get_raw_data (cpuid_raw_data_t *raw)
	Obtains the raw CPUID info from the CPU. More...

int	cpuid_serialize_raw_data (cpuid_raw_data_t raw, const char file)
	Writes the raw CPUID info to a file or stdout. More...

int	cpuid_deserialize_raw_data (cpuid_raw_data_t raw, const char file)
	Reads the raw CPUID info to a file or stdin. More...

int	icuid_identify (cpuid_raw_data_t raw, cpuid_data_t data)
	Identifies the CPU. More...

Enumeration Type Documentation

enum cpu_vendor_t

CPU vendor, as we determined from the Vendor String.

Note: HVs such as KVM don't usually report their own IDs; they usually report their hosts CPU vendor.

Enumerator
VENDOR_UNKNOWN	Unknown Vendor
VENDOR_INTEL	Intel CPU
VENDOR_AMD	AMD CPU
VENDOR_CYRIX	Cyrix CPU
VENDOR_NEXGEN	NexGen CPU
VENDOR_TRANSMETA	Transmeta CPU
VENDOR_UMC	UMC CPU
VENDOR_CENTAUR	IDT CPU
VENDOR_RISE	Rise CPU
VENDOR_SIS	SiS CPU
VENDOR_NSC	National Semiconductor CPU
VENDOR_VIA	VIA CPU
VENDOR_HV_KVM	KVM HV
VENDOR_HV_HYPERV	Microsoft Hyper-V
VENDOR_HV_VMWARE	VMware HV
VENDOR_HV_XEN	Xen HV
NUM_CPU_VENDORS

enum cpuid_feature_t

CPU feature bits.

Usage:

 cpuid_data_t data;
 int ret;
 ...
 ret = icuid_identify(NULL, &data)
 if (ret == ICUID_OK) {
     if (data->flags[CPU_FEATURE_AVX2] && data->xfeatures[XFEATURE_AVX]) {
         // The CPU has AVX2 and AVX (YMM) registers are supported by the OS
     } else {
         // AVX2 unsupported
     }
 } else {
     // Error getting cpu info
 }

Enumerator
CPU_FEATURE_PNI	PNI (SSE3) Instructions Supported
CPU_FEATURE_PCLMULDQ	PCLMULDQ Instruction Supported
CPU_FEATURE_DTS64	64-bit Debug Store Supported
CPU_FEATURE_MONITOR	MONITOR / MWAIT Supported
CPU_FEATURE_DS_CPL	CPL Qualified Debug Store
CPU_FEATURE_VMX	Virtualization Technology Supported
CPU_FEATURE_SMX	Safer Mode Exceptions
CPU_FEATURE_EST	Enhanced SpeedStep
CPU_FEATURE_TM2	Thermal Monitor 2
CPU_FEATURE_SSSE3	SSSE3 Instructions Supported
CPU_FEATURE_CID	Context ID Supported
CPU_FEATURE_SDBG	Silicon Debug Supported
CPU_FEATURE_FMA	The FMA Instruction Set
CPU_FEATURE_CX16	CMPXCHG16B Instruction Supported
CPU_FEATURE_XTPR	Send Task Priority Messages Disable
CPU_FEATURE_PDCM	Performance Capabilities MSR Supported
CPU_FEATURE_PCID	Process Context Identifiers Supported
CPU_FEATURE_DCA	Direct Cache Access Supported
CPU_FEATURE_SSE4_1	SSE 4.1 Instructions Supported
CPU_FEATURE_SSE4_2	SSE 4.2 Instructions Supported
CPU_FEATURE_X2APIC	x2APIC Support
CPU_FEATURE_MOVBE	MOVBE Instruction Supported
CPU_FEATURE_POPCNT	POPCNT Instruction Supported
CPU_FEATURE_TSC_DEADLINE	APIC Supports One-Shot Operation Using A TSC Deadline Value
CPU_FEATURE_AES	AES Instructions Supported
CPU_FEATURE_XSAVE	XSAVE/XRSTOR/XSETBV/XGETBV Instructions Supported
CPU_FEATURE_OSXSAVE	Indicates The OS Enabled Support For XSAVE
CPU_FEATURE_AVX	Advanced Vector Extensions Supported
CPU_FEATURE_F16C	16-bit FP convert Instruction Support
CPU_FEATURE_RDRAND	RDRAND Instruction
CPU_FEATURE_HYPERVISOR	Running On a Hypervisor
CPU_FEATURE_FPU	Floating Point Unit On-Chip
CPU_FEATURE_VME	Virtual Mode Extension
CPU_FEATURE_DE	Debugging Extension
CPU_FEATURE_PSE	Page Size Extension
CPU_FEATURE_TSC	Time Stamp Counter
CPU_FEATURE_MSR	Model Specific Registers, RDMSR/WRMSR Supported
CPU_FEATURE_PAE	Physical Address Extension
CPU_FEATURE_MCE	Machine-Check Exception
CPU_FEATURE_CX8	CMPXCHG8 Instruction Supported
CPU_FEATURE_APIC	On-chip APIC Support
CPU_FEATURE_SEP	Fast System Call (SYSENTER/SYSEXIT) Instructions Supported
CPU_FEATURE_MTRR	Memory Type Range Registers
CPU_FEATURE_PGE	Page Global Enable
CPU_FEATURE_MCA	Machine-Check Architecture
CPU_FEATURE_CMOV	Conditional Move (CMOVxx) Instructions Supported
CPU_FEATURE_PAT	Page Attribute Table
CPU_FEATURE_PSE36	36-bit Page Size Extension
CPU_FEATURE_PN	Processor Serial # Implemented (Intel P3 only)
CPU_FEATURE_CLFLUSH	CLFLUSH Instruction Supported
CPU_FEATURE_DTS	Debug Store Supported
CPU_FEATURE_ACPI	ACPI support (Power States)
CPU_FEATURE_MMX	MMX Instruction Set Supported
CPU_FEATURE_FXSR	FXSAVE/FXRSTOR Supported
CPU_FEATURE_SSE	Streaming SIMD Extensions (SSE) Supported
CPU_FEATURE_SSE2	Streaming SIMD Extensions 2 (SSE2) Instructions Supported
CPU_FEATURE_SS	Self-Snoop
CPU_FEATURE_HT	Hyper-Threading Supported By CPU
CPU_FEATURE_TM	Thermal Monitor
CPU_FEATURE_IA64	IA64 Supported (Itanium only)
CPU_FEATURE_PBE	Pending-Break Enable
CPU_FEATURE_FSGSBASE	Access To Base Of fs And gs
CPU_FEATURE_TSC_ADJUST	TSC Adjustment MSR 0x3b
CPU_FEATURE_SGX	Software Guard Extensions
CPU_FEATURE_BMI1	BMI1 Instructions
CPU_FEATURE_HLE	Transactional Synchronization Extensions
CPU_FEATURE_AVX2	AVX2 Instructions
CPU_FEATURE_SMEP	Supervisor-Mode Execution Prevention
CPU_FEATURE_BMI2	BMI2 Instructions
CPU_FEATURE_ERMS	Enhanced REP MOVSB/STOSB Instructions
CPU_FEATURE_INVPCID	INVPCID Instruction
CPU_FEATURE_RTM	Restricted Transactional Memory
CPU_FEATURE_CQM	Cache QoS Monitoring
CPU_FEATURE_MPX	Intel MPX Extensions
CPU_FEATURE_AVX512F	AVX-512 Foundation
CPU_FEATURE_AVX512DQ	AVX-512 Doubleword and Quadword
CPU_FEATURE_RDSEED	Intel RDSEED Instruction
CPU_FEATURE_ADX	Intel ADX Extensions
CPU_FEATURE_SMAP	Supervisor Mode Access Prevention
CPU_FEATURE_PCOMMIT	PCOMMIT Instruction
CPU_FEATURE_CLFLUSHOPT	CLFLUSHOPT Instruction
CPU_FEATURE_CLWB	CLWB Instruction
CPU_FEATURE_AVX512PF	AVX-512 Prefetch Instructions
CPU_FEATURE_AVX512ER	AVX-512 Exponential and Reciprocal Instructions
CPU_FEATURE_AVX512CD	AVX-512 Conflict Detection Instructions
CPU_FEATURE_SHA	Intel SHA Extensions
CPU_FEATURE_AVX512BW	AVX-512 Byte and Word Instructions
CPU_FEATURE_AVX512VL	AVX-512 Vector Length Instructions
CPU_FEATURE_LAHF_LM	LAHF/SAHF Supported In 64-bit Mode
CPU_FEATURE_CMP_LEGACY	Core Multi-Processing Legacy Mode (AMD Only)
CPU_FEATURE_SVM	AMD Secure Virtual Machine (AMD Only)
CPU_FEATURE_EXTAPIC	Extended APIC space (AMD Only)
CPU_FEATURE_CR8_LEGACY	CR8 in 32-bit mode (AMD Only)
CPU_FEATURE_ABM	Advanced Bit Manipulation (AMD Only)
CPU_FEATURE_SSE4A	SSE 4A (AMD Only)
CPU_FEATURE_MISALIGNSSE	Misaligned SSE Supported (AMD Only)
CPU_FEATURE_3DNOWPREFETCH	PREFETCH/PREFETCHW Support (AMD Only)
CPU_FEATURE_OSVW	OS Visible Workaround (AMD Only)
CPU_FEATURE_IBS	Instruction-Based Sampling (AMD Only)
CPU_FEATURE_XOP	The XOP Instruction Set (AMD Only)
CPU_FEATURE_SKINIT	SKINIT/STGI Supported (AMD Only)
CPU_FEATURE_WDT	Watchdog Timer Support (AMD Only)
CPU_FEATURE_LWP	Light Weight Profiling (AMD Only)
CPU_FEATURE_FMA4	The FMA4 Instruction Set (AMD Only)
CPU_FEATURE_TCE	Translation Cache Extension (AMD Only)
CPU_FEATURE_NODEID_MSR	NodeId MSR (AMD Only)
CPU_FEATURE_TBM	Trailing bit manipulation Instruction support (AMD Only)
CPU_FEATURE_TOPOEXT	Topology extension CPUID leafs (AMD Only)
CPU_FEATURE_PERFCTR_CORE	Core Performance Counter Extensions (AMD Only)
CPU_FEATURE_PERFCTR_NB	NB Core Performance Counter Extensions (AMD Only)
CPU_FEATURE_BPEXT	Data Breakpoint Extension (AMD Only)
CPU_FEATURE_PERFCTR_L2	L2 Performance Counter Extensions (AMD Only)
CPU_FEATURE_MONITORX	MONITORX / MWAITX Supported (AMD Only)
CPU_FEATURE_SYSCALL	SYSCALL/SYSRET Instructions Supported
CPU_FEATURE_NX	No-Execute Bit Supported
CPU_FEATURE_MMXEXT	AMD MMX-Extended Instructions Supported
CPU_FEATURE_FXSR_OPT	FXSAVE and FXRSTOR Instructions (AMD Only)
CPU_FEATURE_PDPE1GB	Gibibyte Pages Supported
CPU_FEATURE_RDTSCP	RDTSCP Instruction Supported
CPU_FEATURE_LM	Long Mode (x86_64/EM64T) Supported
CPU_FEATURE_3DNOWEXT	AMD 3DNow! Extended Instructions Supported
CPU_FEATURE_3DNOW	AMD 3DNow! Instructions Supported
CPU_FEATURE_TS	Temperature Sensor (AMD Only)
CPU_FEATURE_FID	Frequency ID Control (AMD Only)
CPU_FEATURE_VID	Voltage ID Control (AMD Only)
CPU_FEATURE_TTP	THERMTRIP (AMD Only)
CPU_FEATURE_TM_AMD	AMD Specified Hardware Thermal Control
CPU_FEATURE_STC	Software Thermal Control (AMD Only)
CPU_FEATURE_100MHZSTEPS	100 MHz Multiplier Control (AMD Only)
CPU_FEATURE_HWPSTATE	Hardware P-state Control (AMD Only)
CPU_FEATURE_CONSTANT_TSC	TSC ticks At A Constant Rate
CPU_FEATURE_CPB	Core Performance Boost (AMD Only)
CPU_FEATURE_APERFMPERF	MPERF/APERF MSRs support (AMD Only)
CPU_FEATURE_PFI	Processor Feedback Interface Support (AMD Only)
CPU_FEATURE_PA	Processor Accumulator (AMD Only)
CPU_FEATURE_CLZERO	CLZERO Instruction Support (AMD Only)
CPU_FEATURE_IRPERF	Instructions Retired Count (AMD Only)
CPU_FEATURE_SME	Secure Memory Encryption Support (AMD Only)
NUM_CPU_FEATURES

enum xfeature_t

XSAVE Features, used to determine if a particular feature is supported and enabled by the OS.

Enumerator
XFEATURE_FP	x87 FPU State
XFEATURE_SSE	SSE (XMM) State
XFEATURE_AVX	AVX (YMM) State
XFEATURE_BNDREGS	MPX: BND0-BND3 Regs State
XFEATURE_BNDCSR	MPX: Bounds configuration and status component State
XFEATURE_OPMASK	AVX-512: Opmask Regs State
XFEATURE_ZMM_Hi256	AVX-512: ZMM0-ZMM15 Regs State
XFEATURE_Hi16_ZMM	AVX-512: ZMM16-ZMM31 Regs State
XFEATURE_IA32_XSS	Extended Supervisor State Mask (R/W) MSR State
XFEATURE_PKRU	Protection Key Rights register for User pages State
NUM_XFEATURES

Function Documentation

const char* cpu_feature_str ( cpuid_feature_t feature )

Returns the short form of the CPU feature flag.

Parameters

feature [in] - the feature, whose short form is desired

Returns: a (const char) string of the CPU feature flag; e.g. "avx"

void cpuid	(	uint32_t	eax,
		uint32_t *	regs
	)

Run the cpuid instruction.

Parameters

[in]	eax	- passed in to the EAX register when executing cpuid
[out]	regs	- result of cpuid. regs[0] = EAX, regs[1] = EBX, regs[2] = ecx, ...

Note: cpuid will be executed with the input eax into the EAX register and all of the other registers (EBX, ECX, EDX) will be set to 0.

int cpuid_deserialize_raw_data	(	cpuid_raw_data_t *	raw,
		const char *	file
	)

Reads the raw CPUID info to a file or stdin.

Parameters

raw	[in] - a pointer to a cpuid_raw_data_t structure
file	[in] - the path to the file, where the serialized raw data should be read from. If empty, stdin will be used instead.

Note: This is primarily intended for debugging use. e.g. if someone has an error with the returned data they can send the raw data to us for us to fix. Backwards compatibility is not guaranteed nor is forwards compatibility.

Returns: ICUID_OK if successful, and some other error code otherwise. The error message can be obtained by calling icuid_errorstr.

void cpuid_ext ( uint32_t * regs )

Run the cpuid instruction with custom register values.

Parameters

[in]	regs	- regs[0] (EAX), regs[1] (EBX), regs[2] (ECX), regs[3] (EDX)
[out]	regs	- result of cpuid. regs[0] = EAX, regs[1] = EBX, regs[2] = ecx, ...

Note: cpuid will be executed with the input regs copied into their respective registers and the original input registers will be overwritten with the output of cpuid

int cpuid_get_raw_data ( cpuid_raw_data_t * raw )

Obtains the raw CPUID info from the CPU.

Parameters

raw	[in] - a pointer to a cpuid_raw_data_t structure

Returns: ICUID_OK if successful, and some other error code otherwise. The error message can be obtained by calling icuid_errorstr.

int cpuid_is_supported ( void )

Check if the cpuid instruction is supported.

Return values

ICUID_OK	if the cpuid instruction is supported.
ICUID_NO_CPUID	if the cpuid instruction is unsupported.

int cpuid_serialize_raw_data	(	cpuid_raw_data_t *	raw,
		const char *	file
	)

Writes the raw CPUID info to a file or stdout.

Parameters

raw	[in] - a pointer to a cpuid_raw_data_t structure
file	[in] - the path to the file, where the serialized raw data should be written. If empty, stdout will be used instead.

Note: This is primarily intended for debugging use. e.g. if someone has an error with the returned data they can send the raw data to us for us to fix. Backwards compatibility is not guaranteed nor is forwards compatibility.

Returns: ICUID_OK if successful, and some other error code otherwise. The error message can be obtained by calling icuid_errorstr.

int icuid_identify	(	cpuid_raw_data_t *	raw,
		cpuid_data_t *	data
	)

Identifies the CPU.

Parameters

raw	[in] - a pointer to the raw CPUID data, which is obtained by cpuid_get_raw_data or by passing NULL, in which case the function calls cpuid_get_raw_data itself.
data	[out] - the decoded CPU information

Note: This function will not fail even if some info is not collected due to error or unsupported info.

Returns: ICUID_OK if successful, and some other error code otherwise. The error message can be obtained by calling icuid_errorstr.

uint64_t icuid_xgetbv ( const uint32_t xcr )

Run the xgetbv instruction.

Parameters

[in] xcr - passed in to the ECX register when executing xgetbv (can only be 0 atow)

Returns: 64-bits of the extended control register (XCR) specified by |xcr|

Warning: This function will cause a crash if an unsupported XCR is used. For example icuid_xgetbv(0) can't be used if data->features[CPU_FEATURE_OSXSAVE] is not set

Classes

Enumerations

Functions

Enumeration Type Documentation

Function Documentation